EDA: standard cells for chip design

A standard cell is group of transistor and interconnect structures, which provides a boolean logic function (e.g., AND, OR, XOR, XNOR, inverters) or a storage function (flipflop or latch). All CAD tools for chip design (whether proprietary or open source) require standard cell libraries. These standard cell libraries contain primitive cells required for digital design.

A fedora user will have some standard cell libraries from

the alliance package

the pharosc package

# yum install pharosc\*

Pharosc provides five new open source standard cell libraries, the vsclib, wsclib, vxlib, vgalib and rgalib. They have been drawn with the Graal software from Alliance, part of an extensive open source software suite for designing integrated circuits with a standard cell design methodology.

The libraries have been characterized in a generic 0.13µm technology, compatible with most foundry rules. Pharosc is the result of a book that Graham Petley is writing, The Art of Standard Cell Library Design.

Among the standard cells from pharosc there are many scripts to provide interoperability between magic, alliance and xcircuit as well as scripts to allow one to update actual cells or create his/her own cells (pharosc-devel). There are more than 500 spice decks which can be simulated with either gnucap or ngspice.

Each single component in any standard cell library comes with a well documentation html manual.
The latter entails schematics, layouts and several parameters for spice simulation. The transistor schematics for the libraries have been drawn with Xcircuit, which uses Postscript as its native file format.

Pharosc entails Alliance's sxlib which has been characterised in 0.13µm using the same methodology and converted to the same 0.13µm layout rules. There is also an ssxlib which is the Alliance sxlib converted with a script from 1µm to 2µm layout and adjusted to obey DSM layout rules. The adjustments change the timing slightly.